A semiconductor wafer, such as a silicon or a gallium arsenide wafer, generally has a substrate surface on which one or more integrated circuits is formed. The substrate surface is desirably as flat, or planar, as possible before the surface is processed to form the integrated circuits. A variety of semiconductor processes are used to form the integrated circuits on the flat surface, during which the wafer takes on a defined topography. If this topography is too irregular or includes surface imperfections, fabrication processes, such as photolithography, are often compromised, and the resulting semiconductor device is often inoperable or highly subject to failure. Thus, it is often necessary to polish the wafer surface to render it as planar or uniform as possible and to remove surface imperfections.
Chemical-mechanical polishing or planarization (CMP) processes are well-known. See, for example, Chemical Mechanical Polishing in Silicon Processing, Semiconductors and Semimetals, Vol. 63, Edited by Li, S. et al. CMP processes are commonly used to polish or “planarize” the surfaces of wafers at various stages of fabrication to improve wafer yield, performance and reliability. In CMP, typically the wafer is held in place on a carrier using negative pressure, such as vacuum, or hydrostatic or pneumatic pressure. The carrier is typically situated over a polishing pad that is situated on a platen. CMP generally involves applying a polishing composition or slurry to the polishing pad, establishing contact between the wafer surface and the polishing pad, and applying a downward pressure on the wafer carrier while providing relative motion, typically rotational or orbital motion, between the wafer surface and the polishing pad. Typically, this relative motion involves movement of both the carrier and the platen at the same or different speeds.
The polishing composition typically contains an abrasive material, such as silica and/or alumina particles, in an acidic, neutral, or basic solution. Merely by way of example, a polishing composition useful in the CMP of tungsten material on a substrate may contain abrasive alumina (Al2O3), also called aluminum oxide, an oxidizing agent such as hydrogen peroxide (H2O2), and either potassium hydroxide (KOH) or ammonium hydroxide (NH4OH). A CMP process employing such a polishing composition may provide a predictable rate of polishing, while largely preserving desirable insulation features on the wafer surface.
CMP is used in a variety of semiconductor processes to polish wafers having a variety of surface features, such as oxide and/or metal layers. By way of example, often the surface of a semiconductor wafer has insulation or oxide features, the grooves or stud vias of which are filled with a metal or a metal alloy. Typical filler metals or alloys include aluminum, copper, titanium, titanium nitride, tantalum, tantalum nitride, tungsten, and any combination of these metals or alloys. For such a semiconductor wafer, a typical CMP process involves polishing the metal in a controlled manner to remove unwanted metal and “stop on” the oxide beneath the metal, such that the remaining metal is substantially coplanar with the oxide and remains in the grooves or stud vias of the oxide. After CMP, the substantially coplanar surface is ready for further processing. CMP is currently the primary method used to polish or “planarize” wafers in back end of the line (BEOL) processes.
Semiconductor fabrication processes such as photolithography have evolved significantly, such that advanced devices having very fine oxide, metal, and other surface features, with sub-0.25 micron geometries (such as 0.18 micron or less), are now being made. Process tolerances are necessarily tighter for these advanced devices, calling for improvements in CMP technology to obtain desired material removal rates while minimizing wafer defects or damage. A variety of approaches have been taken in an effort to improve CMP processes.
One approach has involved increasing the downward pressure on the wafer carrier in order to increase material removal rates. This approach is generally disfavored as the requisite downward pressure is considered too high and too likely to cause wafer damage, such as scratching, delamination, or destruction of material layers on the wafer. When the wafer is fragile, as is generally the case with substrates layered with films, such as porous films, having a low dielectric constant, these damage issues are particularly acute and detrimental in terms of wafer yield and performance.
Another approach has involved increasing the amount of oxidizing agent used in the CMP slurry in an effort to increase chemical removal of targeted material. This approach is largely disfavored as the use of increased amounts of oxidizing agents detrimentally add to the handling issues and environmental issues associated with many oxidizing agents and thus increase costs. Attempts to catalyze the oxidizing agent to increase removal rates have also had limited success. Additional approaches have involved using a combination of CMP slurries, including for example, a zirconium slurry, a combination of abrasive particles in a CMP slurry, and/or using point-of-use mixing techniques. These approaches are generally undesirable, as they typically complicate CMP in terms of tooling and process control for example, consume more process time, and/or increase costs.
Yet another approach has involved trying various abrasive components in the CMP slurry. That is, many of the commonly used abrasive particles, such as alumina, silica, and zirconia, introduce wafer defects, such as scratches or micro-scratches on the wafer surface or abrasive particles that are retained on the wafer surface, which complicate the process of patterning the wafer surface. Composite abrasives, such as aggregates of inorganic particles, such as silica and alumina, and thermoplastic resin particles, have been tried as alternatives to the commonly used abrasives. See, for example, European Patent Application Publication No. EP 1036836 A1 of Yano et al. However, these composite abrasives are typically dispersed in the CMP slurry via ultrasonic irradiation or mechanical shear stress, which may result in the formation of large aggregate particles and/or the presence of disaggregated, hard inorganic particles, which can cause wafer damage or defects, such as micro-scratching, or can be otherwise undesirable.
Various approaches, such as those mentioned above, have been taken in an effort to improve CMP processes used in connection with metals commonly used in the patterning of integrated circuits, such as aluminum-based metals, for example, to reduce wafer damage or defects. However, as semiconductor fabrication processes have evolved, new metals, such as copper-based metals, have come into play. For example, there has been a movement toward using copper and copper alloys in place of aluminum and aluminum alloys in VLSI and ULSI circuits, as copper has a lower resistivity and a significantly higher electromigration resistance than aluminum. Unfortunately, copper-based metal layers are particularly susceptible to the micro-scratching that is associated with the use of commonly used abrasives in CMP slurry compositions and processes.
Generally, two processes have been developed for the CMP of wafers having copper-based surface features. One of these processes is a continuous CMP process involving one CMP composition. While the process is generally designed as a single-step process, the polishing may be accomplished in as many steps as needed. As a general example, an initial process step involving a high downward pressure, such as a pressure of about 3 psi to about 6 psi, for example, may be used to remove the majority of the copper topography at a certain removal rate, and a subsequent process step involving a lower downward pressure, such as a pressure of about 0.5 psi to about 3 psi, for example, may be used to remove the remaining copper and barrier layer at a lower removal rate. See, for example, P. Gopalan, T. Buley, and M. Kulus, A 90 mm Copper Process with Low Defectivity Using Optimized Copper and Barrier Removal Slurries, 8th International Chemical-Mechanical Planarization for ULSI Multilevel Interconnect, Feb. 19, 2003, Marina Del Rey, Calif., p. 257. The other of these processes has an initial polishing step that involves one CMP composition and a subsequent polishing step that involves another CMP composition. The initial step and CMP composition are designed for a relatively quick polishing or removal of the copper topography, and the subsequent, step and CMP composition are designed for a relatively slow removal of copper and a relatively fast removal of the barrier layer. See, for example, Y. Yamada, H. Terazaki, and N. Konishi, Improved Cu Abrasive-Free Polishing for 90 mn Node Process, 8th International Chemical-Mechanical Planarization for ULSI Multilevel Interconnect, Feb. 19, 2003, Marina Del Rey, Calif., p. 301. Generally, whatever CMP process is used in connection with substrates having copper-based metal features, micro-scratching of the copper-based metal may be of concern.
Further developments in the field of CMP technology are desired.